Histogram Distribution and Display
| Task | Months | When | Who |
| Revive Taras code | 1? | Slice | |
| Learn LVL2 alternative | 1? | Slice | |
| Code from Tara exists | |||
DCS
| Task | Months | When | Who |
| High level SCADA code | 2? | Later | |
| Learn and use DAQ DCS connection | 1? | Later |
Test Vectors, Simulation and Testing
| Task | Months | When | Who |
| Documentation (req,design,user) | 1 | Tests | SJH |
| Test vector code for all modules | 2? | Tests | SJH+ |
| Simulation of all processor stages | 2? | Tests | SJH+ |
| Testing framework | 1? | Tests | SJH |
| Some test vector code and initial implementation of framework exists | |||
Actually Testing the System
| Task | Months | When | Who |
| Module tests (CMM,CMM,PPM,JEM,etc) | 10? | Tests | * |
| Subsystem tests (PP,CP,JEP) | 6? | Tests | * |
| Slice tests | 6? | Slice | * |
| TDAQ integration tests | 4? | Later | * |
| Some test vector code and initial implementation of framework exists | |||